Intel Xeon "Dunnington"

The Intel "Dunnington", successor of the "Tigerton" (Xeon X73xx, E73xx, L73xx) and "Tulsa", is scheduled for the third quarter of this year, just ahead of the brand new architecture, "Nehalem"-derivatives for the enterprise and high performance workstation segment.

This will likely be the "swan song" of the venerable Socket 604, in use since the old "Paxville" MP (early Pentium 4's "Netburst" offspring), but it will go out with a bang, nevertheless.

The big news: 45nm, single die, 6-core design, with up to 16MB of shared L3 cache.
Despite the single die and L3 cache, it is not a brand new architecture with an integrated memory controller, but a mere "packaging" of 3 dual-core 45nm Core 2 derivatives, with each pair of cores sharing a single 3MB of L2 cache, and only then accessing the other cores though the rather large, but much higher latency L3 space.

The increased computing density's need for one big FSB bus (impractical with the soon-to-be-retired GTL+ protocol design and hardware infrastructure in place) is therefore offset by the shared L3 -up to a point-.
This also means a new and easy, drop-in upgrade path for most high-density setups.

Of course, Nehalem will not benefit from it, so Intel is giving the socket 604 one last chance until the "Quickpath"-enabled motherboards start over with a clean slate (which could take years, giving the server market's lag against the desktop/notebook typical upgrade patterns).